With the advancement of integrated circuit technology, the need to miniaturize integrated circuit packaging to meet the needs of this integrated circuit technology has increased exponentially. This requirement has resulted in chip-scale packaging, wherein the ultimate goal is to have both the integrated circuit and the integrated circuit package be virtually the same size.
An integrated circuit package usually includes a mounting substrate and an integrated circuit, such as a semiconductor chip or die. The integrated circuit is located on or in the mounting substrate. One class of chip packaging includes integrated circuits that are produced with solder contacts, on an active surface thereof, for purposes of electrically connecting the integrated circuit to solder deposits on the mounting substrate. The term active surface of an integrated circuit, as used herein, means the surface which carries integrated circuitry. The term back surface, as used herein, means a side of the integrated circuit that is positioned opposite and parallel planar with the active surface.
During packaging, an epoxy underfill material is introduced into a space between the integrated circuit and the mounting substrate and is cured thereafter. The epoxy acts to bond the integrated circuit to the mounting substrate and to protect the solder contacts. The underfill material that has been inserted between the integrated circuit and the mounting substrate typically has a non-uniform profile. The non-uniform profile is often due to the underfill material including both an interstitial portion that is sandwiched between the integrated circuit and the mounting substrate, as well as a fillet portion that extends diagonally from the integrated circuit side walls to the mounting substrate.